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[VHDL-FPGA-Verilog] FPGA_DESIGNED

Description: 曾经的硕士论文，基于FPGA的8051的soc核研究，用FPGA实现的51核，对FPGA的学习很有帮助-Have master' s thesis, based on the FPGA of the soc of the 8051 nuclear research, with FPGA to achieve the 51 nuclear, helpful for learning FPGA
Platform: | Size: 5193728 | Author: 菠萝 | Hits:

[VHDL-FPGA-Verilog] Original-8051VhdlModel

Description: this a file about vhdl source code realtinf 8051 through 8051-this is a file about vhdl source code realtinf 8051 through 8051
Platform: | Size: 225280 | Author: nirmit | Hits:

[VHDL-FPGA-Verilog] u8051

Description: 8051VHDL原代码，编译成功，可下载到FPGA运行-8051VHDL
Platform: | Size: 9049088 | Author: yangguang | Hits:

[VHDL-FPGA-Verilog] i8051

Description: vhdl code for 8051 microcontroller
Platform: | Size: 20480 | Author: Muftah | Hits:

[VHDL-FPGA-Verilog] 8051_test2

Description: 利用FPGA实现51IP核的下载和运行，并在下载到FPGA后，在改51IP核上运行自己编写的单片机程序，软核51单片机有利的解决了，硬件51单片机的很多限制，提高了单片机的性能。-FPGA realization of the use of nuclear 51IP download and run, and downloaded to the FPGA after the nuclear 51IP to run their own procedures for the preparation of the single-chip, single-chip soft-core 51 favorable resolved, single-chip hardware of many restrictions 51 to improve the performance of a single chip.
Platform: | Size: 1762304 | Author: 贾衡天 | Hits:

[VHDL-FPGA-Verilog] DW8051

Description: 一个兼容keil的8051内核，在Quartus II 8.0 上编译通过的。希望对大家有帮助-Keil a 8051-compatible core, the Quartus II 8.0, adopted by the compiler. We want to help! !
Platform: | Size: 4737024 | Author: 1987 | Hits:

[VHDL-FPGA-Verilog] 51IP

Description:
Platform: | Size: 14004224 | Author: 钟桂东 | Hits:

[VHDL-FPGA-Verilog] vhdl

Description: A vhdl implementation of 8051 micro controller. this code is from oregano.
Platform: | Size: 100352 | Author: baba | Hits:

[Other] uc_interface

Description: This file provides an 8051 external data memory bus interface for CoolRunner CPLDs. This file contains the state machine to interface on the 8051 bus as well as the address registers, the address decode logic, and example control registers, status registers, data input registers, and data output registers. Interrupt logic is also included. Note that this code should be modified to meet the requirements of the system. -This file provides an 8051 external data memory bus interface for CoolRunner CPLDs. This file contains the state machine to interface on the 8051 bus as well as the address registers, the address decode logic, and example control registers, status registers, data input registers, and data output registers. Interrupt logic is also included. Note that this code should be modified to meet the requirements of the system.
Platform: | Size: 4096 | Author: alex | Hits:

[VHDL-FPGA-Verilog] 8051core-Verilog

Description: C51 verilog 源代码，可以在逻辑中实现51单片机功能-C51 verilog
Platform: | Size: 52224 | Author: 韩涛 | Hits:

[VHDL-FPGA-Verilog] AlterMCU8051IP

Description: 8051IP核 FPGA ALTER公司-8051IP-core FPGA
Platform: | Size: 9214976 | Author: gongcheng | Hits:

[VHDL-FPGA-Verilog] 8051

Description: USB_VHDL USB文件 大家可以参考一下-USB_VHDL USB file you can refer to what
Platform: | Size: 646144 | Author: Alex | Hits:

[VHDL-FPGA-Verilog] 051vhdl

Description: cpu8051 vhdl-8051 open source code.....................................
Platform: | Size: 214016 | Author: huang | Hits:

[MiddleWare] 8051

Description: VHDL描述的8051软核，用于FPGA片上系统应用-VHDL description of the 8051 soft-core for the FPGA on-chip system application
Platform: | Size: 1733632 | Author: DENGWEI | Hits:

[Embeded-SCM Develop] Core8051

Description: 8051 IPCORE vhdl code-8051 ipcore VHDL CODE
Platform: | Size: 10528768 | Author: 郭强 | Hits:

[VHDL-FPGA-Verilog] 8051_latest.tar

Description: VHDL/VERILOG FOR 8051 Core
Platform: | Size: 7007232 | Author: mss | Hits:

[VHDL-FPGA-Verilog] rtl_v

Description: 8051 alu in verilog not vhdl this fucking shit website
Platform: | Size: 106496 | Author: dark schneider | Hits:

[VHDL-FPGA-Verilog] A-Simplified-VHDL-UART

Description: In embedded systems, the processor that we choose for our design may not come with built-in peripherals. Therefore, designers will have to implement these devices in hardware keeping in mind that they will need to interface to the processor. In this lab we will design a simplified UART (Universal Asynchronous Reciever Transmitter) in VHDL and download it to the FPGA on the XS40 baord. Serial communication is often used either to control or to receive data from an embedded microprocessor. Serial communication is a form of I/O in which the bits of a byte begin transferred appear one after the other in a timed sequence on a single wire. Serial communication has become the standard for intercomputer communication. In this lab, we ll try to build a serial link between 8051 and PC using RS232.
Platform: | Size: 374784 | Author: mezzich | Hits:

[VHDL-FPGA-Verilog] IP-code(8051-cpu-jtag-vga_lcd-i2c)

Description: ip核源码，包含8051,cpu,jtag,vga_lcd,i2c，使用vhdl语言编写，-ip nuclear source, including 8051, cpu, jtag, vga_lcd, i2c, using vhdl language,
Platform: | Size: 1290240 | Author: fanglong | Hits:

[VHDL-FPGA-Verilog] mc8051-IP

Description: VHDL 8051 IP, VHDL写的8051的IP核。-VHDL 8051 IP
Platform: | Size: 394240 | Author: Bob | Hits:
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